Radio Control  Control Software and GUI for the Panoradio SDR, by DC9ST 2016
ip_cores_hdmi.h
1 #ifndef IP_CORES_H
2 #define IP_CORES_H
3 
7 // --------------------------------------------------------------------------------
8 // Frontend
9 // --------------------------------------------------------------------------------
10 #define ADC_SPI_ADDRESS 0x83C00000
11 #define ADC_SPI_MEMSIZE 64
12 
13 #define ADC_DATA_ADDRESS 0x83D00000
14 #define ADC_DATA_MEMSIZE 64
15 
16 #define SIGNALSCALER_RF_ADDRESS 0x83C10000
17 #define SIGNALSCALER_RF_MEMSIZE 64
18 //#define SIGNALSCALER_RF_MAX 4 // value specified in ip core (shift value bw)
19 #define SIGNALSCALER_RF_MAX_DB 48 // max scaling value in db
20 
21 #define INPUT_MUX_ADDRESS 0x81240000
22 #define INPUT_MUX_MEMSIZE 64
23 
24 #define RELAIS_CTRL_ADDRESS 0x81260000
25 #define RELAIS_CTRL_SIZE 64
26 
27 // --------------------------------------------------------------------------------
28 // Waterfall DDC
29 // --------------------------------------------------------------------------------
30 
31 #define CAPTURE_RF_ADDRESS 0x83C30000
32 #define CAPTURE_RF_MEMSIZE 64
33 #define CAPTURE_RF_SIZE 4096 // min 4096
34 
35 #define IQ_RESET_ADDRESS 0x81230000
36 #define IQ_RESET_MEMSIZE 64
37 
38 #define MIXER_GAIN 26 // aus Matlab
39 
40 
41 // DDC
42 #define DDS_LO_ADDRESS 0x83D60000
43 #define DDS_LO_MEMSIZE 64
44 #define DDS_LO_MASTERFREQUENCY 250000 // clock (master) clock frequency of the core in kHz
45 #define DDS_LO_PHASEWIDTH 28 // phase width (look up in vivado under block design -> DDS menu -> Summary -> Phase Width (not Phase Angle Width))
46 
47 #define CIC_ADDRESS 0x83D50000
48 #define CIC_MEMSIZE 64
49 #define CIC_GAIN 0
50 
51 #define CIC_BYPASS_ADDRESS 0x81250000
52 #define CIC_BYPASS_MEMSIZE 64
53 
54 #define FIR_GAIN 5 // einfach gemessen
55 
56 #define CAPTURE_IQ_ADDRESS 0x83CF0000
57 #define CAPTURE_IQ_MEMSIZE 64
58 #define CAPTURE_IQ_SIZE 8192 //16384
59 
60 
61 
62 // --------------------------------------------------------------------------------
63 // Audio RX
64 // --------------------------------------------------------------------------------
65 
66 #define AUDIO_RX_RESET_IQ_ADDRESS 0x81210000
67 #define AUDIO_RX_RESET_IQ_MEMSIZE 64
68 
69 #define AUDIO_RX_DDC_SELECT_ADDRESS 0x81200000
70 #define AUDIO_RX_DDC_SELECT_MEMSIZE 64
71 
72 #define AUDIO_RX_OUT_CAPTURE_IQ_ADDRESS 0x83CA0000 // after asrc
73 #define AUDIO_RX_OUT_CAPTURE_IQ_MEMSIZE 64
74 #define AUDIO_RX_OUT_CAPTURE_IQ_SIZE 256
75 
76 // Audio DDC 0
77 #define AUDIO_DDC0_LO_ADDRESS 0x83D10000
78 #define AUDIO_DDC0_LO_MEMSIZE 64
79 #define AUDIO_DDC0_LO_MASTERFREQUENCY 250000
80 #define AUDIO_DDC0_LO_PHASEWIDTH 28
81 
82 #define AUDIO_DDC0_CAPTURE_IQ_ADDRESS 0x83C60000
83 #define AUDIO_DDC0_CAPTURE_IQ_MEMSIZE 64
84 #define AUDIO_DDC0_CAPTURE_IQ_SIZE 256
85 
86 // Audio DDC 1
87 #define AUDIO_DDC1_LO_ADDRESS 0x83D20000
88 #define AUDIO_DDC1_LO_MEMSIZE 64
89 #define AUDIO_DDC1_LO_MASTERFREQUENCY 250000
90 #define AUDIO_DDC1_LO_PHASEWIDTH 28
91 
92 #define AUDIO_DDC1_CAPTURE_IQ_ADDRESS 0x83C90000
93 #define AUDIO_DDC1_CAPTURE_IQ_MEMSIZE 64
94 #define AUDIO_DDC1_CAPTURE_IQ_SIZE 256
95 
96 
97 // Audio Backend
98 #define AUDIO_RX_SCALER_I_ADDRESS 0x83D80000
99 #define AUDIO_RX_SCALER_I_MEMSIZE 64
100 
101 #define AUDIO_RX_SCALER_Q_ADDRESS 0x83D90000
102 #define AUDIO_RX_SCALER_Q_MEMSIZE 64
103 
104 //#define AUDIO_RX_SCALER_MAX 4
105 #define AUDIO_RX_SCALER_MAX_DB 48
106 
107 #define AUDIO_RX_MUX_CTRL_ADDRESS 0x81220000
108 #define AUDIO_RX_MUX_CTRL_MEMSIZE 64
109 
110 #define AUDIO_WEAVER_LO_ADDRESS 0x83D30000
111 #define AUDIO_WEAVER_LO_MEMSIZE 64
112 #define AUDIO_WEAVER_LO_MASTERFREQUENCY 100000 // clock (master) clock frequency of the core in kHz
113 #define AUDIO_WEAVER_LO_PHASEWIDTH 27 // phase width (look up in vivado under block design -> DDS menu -> Summary -> Phase Width (not Phase Angle Width))
114 
115 
116 
117 
118 // --------------------------------------------------------------------------------
119 // Debug Cores
120 // --------------------------------------------------------------------------------
121 
122 // RF Testgenerator
123 #define DDS_TESTRF_ADDRESS 0x83D40000
124 #define DDS_TESTRF_MEMSIZE 64
125 #define DDS_TESTRF_MASTERFREQUENCY 250000 // clock (master) clock frequency of the core in Hz
126 #define DDS_TESTRF_PHASEWIDTH 28 // phase width (look up in vivado under block design -> DDS menu -> Summary -> Phase Width (not Phase Angle Width))
127 
128 // Impulse Stimulator
129 #define IMPULSE_STIMU_ADDRESS 0x83D70000
130 #define IMPULSE_STIMU_MEMSIZE 64
131 
132 // Waterfall DDC
133 #define CAPTURE_MIXER_ADDRESS 0x83CE0000
134 #define CAPTURE_MIXER_MEMSIZE 64
135 #define CAPTURE_MIXER_SIZE 512
136 
137 #define CAPTURE_CIC_ADDRESS 0x83CD0000
138 #define CAPTURE_CIC_MEMSIZE 64
139 #define CAPTURE_CIC_SIZE 512
140 
141 //audio RX
142 #define CAPTURE_DBG_AUDIO_DDC_ADDRESS 0x83CA0000 //?
143 #define CAPTURE_DBG_AUDIO_DDC_MEMSIZE 64
144 #define CAPTURE_DBG_AUDIO_DDC_SIZE 512
145 
146 #define CAPTURE_DBG_AUDIO_SCALING_ADDRESS 0x83CB0000
147 #define CAPTURE_DBG_AUDIO_SCALING_MEMSIZE 64
148 #define CAPTURE_DBG_AUDIO_SCALING_SIZE 512
149 
150 #define CAPTURE_DBG_AUDIO_ASRC_ADDRESS 0x83CA0000
151 #define CAPTURE_DBG_AUDIO_ASRC_MEMSIZE 64
152 #define CAPTURE_DBG_AUDIO_ASRC_SIZE 512
153 
154 #define CAPTURE_DBG_AUDIO_WEAVER_ADDRESS 0x83C20000 //?
155 #define CAPTURE_DBG_AUDIO_WEAVER_MEMSIZE 64
156 #define CAPTURE_DBG_AUDIO_WEAVER_SIZE 512
157 
158 
159 // General Purpose, Complex/Dual
160 #define CAPTURE_DBG_DBG_DUAL_ADDRESS 0x83CC0000 // aktuell = weaver LO
161 #define CAPTURE_DBG_DBG_DUAL_MEMSIZE 64
162 #define CAPTURE_DBG_DBG_DUAL_SIZE 512
163 
164 // General Purpose, Real
165 #define CAPTURE_DBG_DBG_ADDRESS 0x83C30000 // dummy RF capture
166 #define CAPTURE_DBG_DBG_MEMSIZE 64
167 #define CAPTURE_DBG_DBG_SIZE 512
168 
169 
170 #define AUDIO_RX_USE_FIFO 0 //?
171 
172 #endif // IP_CORES_H