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ip_cores_hdmi.h
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#ifndef IP_CORES_H
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#define IP_CORES_H
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// --------------------------------------------------------------------------------
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// Frontend
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// --------------------------------------------------------------------------------
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#define ADC_SPI_ADDRESS 0x83C00000
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#define ADC_SPI_MEMSIZE 64
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#define ADC_DATA_ADDRESS 0x83D00000
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#define ADC_DATA_MEMSIZE 64
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#define SIGNALSCALER_RF_ADDRESS 0x83C10000
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#define SIGNALSCALER_RF_MEMSIZE 64
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//#define SIGNALSCALER_RF_MAX 4 // value specified in ip core (shift value bw)
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#define SIGNALSCALER_RF_MAX_DB 48 // max scaling value in db
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#define INPUT_MUX_ADDRESS 0x81240000
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#define INPUT_MUX_MEMSIZE 64
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#define RELAIS_CTRL_ADDRESS 0x81260000
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#define RELAIS_CTRL_SIZE 64
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// --------------------------------------------------------------------------------
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// Waterfall DDC
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// --------------------------------------------------------------------------------
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#define CAPTURE_RF_ADDRESS 0x83C30000
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#define CAPTURE_RF_MEMSIZE 64
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#define CAPTURE_RF_SIZE 4096 // min 4096
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#define IQ_RESET_ADDRESS 0x81230000
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#define IQ_RESET_MEMSIZE 64
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#define MIXER_GAIN 26 // aus Matlab
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// DDC
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#define DDS_LO_ADDRESS 0x83D60000
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#define DDS_LO_MEMSIZE 64
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#define DDS_LO_MASTERFREQUENCY 250000 // clock (master) clock frequency of the core in kHz
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#define DDS_LO_PHASEWIDTH 28 // phase width (look up in vivado under block design -> DDS menu -> Summary -> Phase Width (not Phase Angle Width))
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#define CIC_ADDRESS 0x83D50000
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#define CIC_MEMSIZE 64
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#define CIC_GAIN 0
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#define CIC_BYPASS_ADDRESS 0x81250000
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#define CIC_BYPASS_MEMSIZE 64
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#define FIR_GAIN 5 // einfach gemessen
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#define CAPTURE_IQ_ADDRESS 0x83CF0000
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#define CAPTURE_IQ_MEMSIZE 64
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#define CAPTURE_IQ_SIZE 8192 //16384
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// --------------------------------------------------------------------------------
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// Audio RX
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// --------------------------------------------------------------------------------
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#define AUDIO_RX_RESET_IQ_ADDRESS 0x81210000
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#define AUDIO_RX_RESET_IQ_MEMSIZE 64
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#define AUDIO_RX_DDC_SELECT_ADDRESS 0x81200000
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#define AUDIO_RX_DDC_SELECT_MEMSIZE 64
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#define AUDIO_RX_OUT_CAPTURE_IQ_ADDRESS 0x83CA0000 // after asrc
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#define AUDIO_RX_OUT_CAPTURE_IQ_MEMSIZE 64
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#define AUDIO_RX_OUT_CAPTURE_IQ_SIZE 256
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// Audio DDC 0
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#define AUDIO_DDC0_LO_ADDRESS 0x83D10000
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#define AUDIO_DDC0_LO_MEMSIZE 64
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#define AUDIO_DDC0_LO_MASTERFREQUENCY 250000
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#define AUDIO_DDC0_LO_PHASEWIDTH 28
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#define AUDIO_DDC0_CAPTURE_IQ_ADDRESS 0x83C60000
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#define AUDIO_DDC0_CAPTURE_IQ_MEMSIZE 64
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#define AUDIO_DDC0_CAPTURE_IQ_SIZE 256
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// Audio DDC 1
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#define AUDIO_DDC1_LO_ADDRESS 0x83D20000
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#define AUDIO_DDC1_LO_MEMSIZE 64
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#define AUDIO_DDC1_LO_MASTERFREQUENCY 250000
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#define AUDIO_DDC1_LO_PHASEWIDTH 28
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#define AUDIO_DDC1_CAPTURE_IQ_ADDRESS 0x83C90000
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#define AUDIO_DDC1_CAPTURE_IQ_MEMSIZE 64
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#define AUDIO_DDC1_CAPTURE_IQ_SIZE 256
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// Audio Backend
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#define AUDIO_RX_SCALER_I_ADDRESS 0x83D80000
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#define AUDIO_RX_SCALER_I_MEMSIZE 64
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#define AUDIO_RX_SCALER_Q_ADDRESS 0x83D90000
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#define AUDIO_RX_SCALER_Q_MEMSIZE 64
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//#define AUDIO_RX_SCALER_MAX 4
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#define AUDIO_RX_SCALER_MAX_DB 48
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#define AUDIO_RX_MUX_CTRL_ADDRESS 0x81220000
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#define AUDIO_RX_MUX_CTRL_MEMSIZE 64
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#define AUDIO_WEAVER_LO_ADDRESS 0x83D30000
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#define AUDIO_WEAVER_LO_MEMSIZE 64
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#define AUDIO_WEAVER_LO_MASTERFREQUENCY 100000 // clock (master) clock frequency of the core in kHz
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#define AUDIO_WEAVER_LO_PHASEWIDTH 27 // phase width (look up in vivado under block design -> DDS menu -> Summary -> Phase Width (not Phase Angle Width))
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// --------------------------------------------------------------------------------
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// Debug Cores
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// --------------------------------------------------------------------------------
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// RF Testgenerator
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#define DDS_TESTRF_ADDRESS 0x83D40000
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#define DDS_TESTRF_MEMSIZE 64
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#define DDS_TESTRF_MASTERFREQUENCY 250000 // clock (master) clock frequency of the core in Hz
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#define DDS_TESTRF_PHASEWIDTH 28 // phase width (look up in vivado under block design -> DDS menu -> Summary -> Phase Width (not Phase Angle Width))
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// Impulse Stimulator
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#define IMPULSE_STIMU_ADDRESS 0x83D70000
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#define IMPULSE_STIMU_MEMSIZE 64
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// Waterfall DDC
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#define CAPTURE_MIXER_ADDRESS 0x83CE0000
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#define CAPTURE_MIXER_MEMSIZE 64
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#define CAPTURE_MIXER_SIZE 512
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#define CAPTURE_CIC_ADDRESS 0x83CD0000
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#define CAPTURE_CIC_MEMSIZE 64
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#define CAPTURE_CIC_SIZE 512
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//audio RX
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#define CAPTURE_DBG_AUDIO_DDC_ADDRESS 0x83CA0000 //?
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#define CAPTURE_DBG_AUDIO_DDC_MEMSIZE 64
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#define CAPTURE_DBG_AUDIO_DDC_SIZE 512
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#define CAPTURE_DBG_AUDIO_SCALING_ADDRESS 0x83CB0000
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#define CAPTURE_DBG_AUDIO_SCALING_MEMSIZE 64
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#define CAPTURE_DBG_AUDIO_SCALING_SIZE 512
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#define CAPTURE_DBG_AUDIO_ASRC_ADDRESS 0x83CA0000
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#define CAPTURE_DBG_AUDIO_ASRC_MEMSIZE 64
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#define CAPTURE_DBG_AUDIO_ASRC_SIZE 512
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#define CAPTURE_DBG_AUDIO_WEAVER_ADDRESS 0x83C20000 //?
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#define CAPTURE_DBG_AUDIO_WEAVER_MEMSIZE 64
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#define CAPTURE_DBG_AUDIO_WEAVER_SIZE 512
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// General Purpose, Complex/Dual
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#define CAPTURE_DBG_DBG_DUAL_ADDRESS 0x83CC0000 // aktuell = weaver LO
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#define CAPTURE_DBG_DBG_DUAL_MEMSIZE 64
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#define CAPTURE_DBG_DBG_DUAL_SIZE 512
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// General Purpose, Real
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#define CAPTURE_DBG_DBG_ADDRESS 0x83C30000 // dummy RF capture
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#define CAPTURE_DBG_DBG_MEMSIZE 64
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#define CAPTURE_DBG_DBG_SIZE 512
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#define AUDIO_RX_USE_FIFO 0 //?
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#endif // IP_CORES_H
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